JPH0338741B2 - - Google Patents
Info
- Publication number
- JPH0338741B2 JPH0338741B2 JP58182006A JP18200683A JPH0338741B2 JP H0338741 B2 JPH0338741 B2 JP H0338741B2 JP 58182006 A JP58182006 A JP 58182006A JP 18200683 A JP18200683 A JP 18200683A JP H0338741 B2 JPH0338741 B2 JP H0338741B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor layer
- single crystal
- island region
- sio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
- H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0188—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/928—Front and rear surface processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/969—Simultaneous formation of monocrystalline and polycrystalline regions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Weting (AREA)
- Bipolar Integrated Circuits (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58182006A JPS6074635A (ja) | 1983-09-30 | 1983-09-30 | 半導体装置の製造方法 |
KR1019840005729A KR890003146B1 (ko) | 1983-09-30 | 1984-09-19 | 유전체 격리구조를 가진 보상 반도체장치를 제조하는 방법 |
US06/652,075 US4579625A (en) | 1983-09-30 | 1984-09-19 | Method of producing a complementary semiconductor device with a dielectric isolation structure |
EP84401871A EP0140749B1 (en) | 1983-09-30 | 1984-09-21 | Method for producing a complementary semiconductor device with a dielectric isolation structure |
DE8484401871T DE3473690D1 (en) | 1983-09-30 | 1984-09-21 | Method for producing a complementary semiconductor device with a dielectric isolation structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58182006A JPS6074635A (ja) | 1983-09-30 | 1983-09-30 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6074635A JPS6074635A (ja) | 1985-04-26 |
JPH0338741B2 true JPH0338741B2 (en]) | 1991-06-11 |
Family
ID=16110672
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58182006A Granted JPS6074635A (ja) | 1983-09-30 | 1983-09-30 | 半導体装置の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US4579625A (en]) |
EP (1) | EP0140749B1 (en]) |
JP (1) | JPS6074635A (en]) |
KR (1) | KR890003146B1 (en]) |
DE (1) | DE3473690D1 (en]) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6081839A (ja) * | 1983-10-12 | 1985-05-09 | Fujitsu Ltd | 半導体装置の製造方法 |
US4961097A (en) * | 1985-03-11 | 1990-10-02 | Motorola Inc. | High frequency photo detector and method for the manufacture thereof |
US4839711A (en) * | 1986-10-16 | 1989-06-13 | Harris Corporation | Dielectric for laser trimming |
US4870029A (en) * | 1987-10-09 | 1989-09-26 | American Telephone And Telegraph Company, At&T-Technologies, Inc. | Method of forming complementary device structures in partially processed dielectrically isolated wafers |
US4820653A (en) * | 1988-02-12 | 1989-04-11 | American Telephone And Telegraph Company | Technique for fabricating complementary dielectrically isolated wafer |
US6228750B1 (en) | 1994-12-30 | 2001-05-08 | Lucent Technologies | Method of doping a semiconductor surface |
KR20100013649A (ko) * | 2008-07-31 | 2010-02-10 | 삼성전자주식회사 | 광전소자 및 이의 제조 방법 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5642352A (en) * | 1979-09-17 | 1981-04-20 | Nippon Telegr & Teleph Corp <Ntt> | Manufacture of composite semiconductor device |
US4408386A (en) * | 1980-12-12 | 1983-10-11 | Oki Electric Industry Co., Ltd. | Method of manufacturing semiconductor integrated circuit devices |
JPS57204133A (en) * | 1981-06-10 | 1982-12-14 | Hitachi Ltd | Manufacture of semiconductor integrated circuit |
JPS59202647A (ja) * | 1983-05-02 | 1984-11-16 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
-
1983
- 1983-09-30 JP JP58182006A patent/JPS6074635A/ja active Granted
-
1984
- 1984-09-19 KR KR1019840005729A patent/KR890003146B1/ko not_active Expired
- 1984-09-19 US US06/652,075 patent/US4579625A/en not_active Expired - Fee Related
- 1984-09-21 DE DE8484401871T patent/DE3473690D1/de not_active Expired
- 1984-09-21 EP EP84401871A patent/EP0140749B1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
KR850002696A (ko) | 1985-05-15 |
DE3473690D1 (en) | 1988-09-29 |
US4579625A (en) | 1986-04-01 |
EP0140749B1 (en) | 1988-08-24 |
KR890003146B1 (ko) | 1989-08-23 |
JPS6074635A (ja) | 1985-04-26 |
EP0140749A1 (en) | 1985-05-08 |
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